Senior Digital Mixed Signal DV Engineer

Own analog mixed-signal verification for TI’s custom mobile electronics products by building coverage-driven verification plans and executing full-cycle RTL and gate-level simulations through tape-out. Develop high-fidelity behavioral models (Verilog-AMS/Verilog-A/Wreal/EENet), enhance mixed-signal testbenches, and create real-time checkers and assertions. Partner with System, Application, Design, Digital DV, and Post-Silicon teams to debug issues and ensure functional correctness.