Subsystem/SoC Level Verification Engineer

Broadcom
India
Workplace: OnsiteFull timeFunction: QA, Test & Release EngineeringExperience: 12-15 yearsEducation: mastersSkills: []

Own Ethernet subsystem/SoC level functional verification, designing verification plans and building tests that validate MAC/PCS/SerDes behavior. Develop verification environments using SystemVerilog and UVM, including BFMs, checkers, monitors, and scoreboards. Execute constrained-random verification with code and functional coverage, perform gate-level/SDF simulations, and debug failures to root cause. Work across IP/subsystem/SoC projects using Cadence or Synopsys tools.

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FursaFursa
Broadcom
Broadcom
1 month ago

Subsystem/SoC Level Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 11 days agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Own Ethernet subsystem/SoC level functional verification, designing verification plans and building tests that validate MAC/PCS/SerDes behavior. Develop verification environments using SystemVerilog and UVM, including BFMs, checkers, monitors, and scoreboards. Execute constrained-random verification with code and functional coverage, perform gate-level/SDF simulations, and debug failures to root cause. Work across IP/subsystem/SoC projects using Cadence or Synopsys tools.
Location: India
Workplace: Onsite
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop verification environments for Ethernet subsystem/SoC functional verification.
  • •Create BFMs, checkers, monitors, and scoreboards to support test execution.
  • •Build block/system level verification plans and develop tests.
  • •Run constrained-random verification, including code and functional coverage.
  • •Perform gate-level/SDF simulations and debug test failures to root cause.

Key Requirements

  • •12–15 years of Ethernet Subsystem/SoC level functional verification experience.
  • •Develop verification environments using System Verilog and UVM.
  • •Develop BFMs/checkers/monitors/scoreboards and build block/system level verification plans and tests.
  • •Debug test failures to determine root cause; work with code and functional coverage.
  • •Experience with constrained random verification, gate-level/SDF simulations, and scripting in Perl and Tcl.
Experience:12-15 yearsEthernetSoC verification
Education:Master's in Electronics/Computer Engg
Tech Stack:System VerilogUVMCadenceSynopsysPerlTcl

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn