Circuit Silicon Correlation DFT Engineer

NVIDIA
Bengaluru
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: mastersSkills: ["Python","Perl","Tcl","Make"]

Join NVIDIA's silicon team to advance DFT-based correlation and pre-silicon validation for RAM and logic. You will develop ATPG patterns, verify RTL/gate-level models, correlate diagnosis with design failures, and enhance RAM testing methods using DFT infrastructures, contributing to robust post-silicon sign-off and silicon reliability in a hybrid work environment.

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FursaFursa
NVIDIA
NVIDIA
5 months ago

Circuit Silicon Correlation DFT Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Join NVIDIA's silicon team to advance DFT-based correlation and pre-silicon validation for RAM and logic. You will develop ATPG patterns, verify RTL/gate-level models, correlate diagnosis with design failures, and enhance RAM testing methods using DFT infrastructures, contributing to robust post-silicon sign-off and silicon reliability in a hybrid work environment.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Develop ATPG patterns for Silicon speed path debug and engage in RTL and gate level verification for ATPG and non-ATPG patterns.
  • •Correlate diagnosis results to map to real design failures and feed learnings back to pre-silicon design sign-off parameters.
  • •Study RAM circuit failure mechanisms and enhance RAM testing methods across RAM types, chips and processes.
  • •Bring in circuit understanding into RAM testing methodologies and improve long-run correlation.
  • •Develop new methodologies using DFT infrastructure to analyze components of mis-correlation in logic and around RAM.

Key Requirements

  • •BSEE in Electrical or Electronics Engineering with 3+ years of experience (MS preferred).
  • •Solid understanding of Design-for-test (DFT) including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.
  • •Experience bringing up RTL/gate level simulation, writing test cases and debugging them.
  • •Experience with pattern generation using tools such as Tessent.
  • •Proficiency in scripting languages such as Python, Perl, Tcl, Make.
Experience:3+ years
Education:Master's
Skills:PythonPerlTclMake
Tech Stack:TessentVCSATPGRTLGate level simulationRAM testing

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
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