Design Engineer II

Cadence Design Systems
Austin
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 2-3 yearsEducation: bachelorsSkills: ["Quality-focused","Customer support","Problem-solving","Collaboration"]

Develop and extend a functional verification environment for Cadence’s Memory Controller IP. You’ll add new features to the verification environment, ensure customer configurations are clean during regressions, and support customers when issues arise. You will lead the verification effort, focusing on functional and code coverage, and ensure the design meets technical and quality metrics set by the team. Work is based in Austin.

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Cadence Design Systems
Cadence Design Systems
3 days ago

Design Engineer II

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Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live
Reposted: similar role first listed 3 months ago

Job Summary

Develop and extend a functional verification environment for Cadence’s Memory Controller IP. You’ll add new features to the verification environment, ensure customer configurations are clean during regressions, and support customers when issues arise. You will lead the verification effort, focusing on functional and code coverage, and ensure the design meets technical and quality metrics set by the team. Work is based in Austin.
Location: Austin
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Lead the verification effort and contribute to functional verification of Cadence’s Memory Controller IP.
  • •Add new features into the existing functional verification environment.
  • •Ensure customer configurations are clean as part of verification regressions.
  • •Support customers in resolving issues related to using the verification environment.
  • •Ensure designs align with technical and quality requirements, especially quality metrics.

Key Requirements

  • •BS/MS in Electrical or Computer Engineering.
  • •At least 2-3 years of relevant experience including design verification experience.
  • •Strong background in functional verification fundamentals, environment planning, test plan generation, and environment development.
  • •UVM-based functional verification environment development experience.
  • •AXI and/or CHI-E experience; DDR memory and memory controller verification experience are desirable.
Experience:2-3 yearsDesign verificationFunctional verificationMemory controller verification
Education:Bachelor's in Electrical / Computer Engineering
Skills:Quality-focusedCustomer supportProblem-solvingCollaboration
Tech Stack:UVMAXICHI-EDDR MemoryTest plan generationFunctional coverageCode coverage

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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