Sr. Design Verification Engineer

Join AMD’s PCIe Verification team to own functional verification of PCIe controller, PCS, and PHY interfaces on next-generation CPUs/GPUs. You’ll develop UVM-based testbenches, write directed and constrained-random tests, debug RTL/testbenches, drive coverage closure, and collaborate across architecture, SoC, PHY, and firmware teams in a hybrid, Markham-based role.