Lead DFx Silicon Design Engineer

AMD
Bengaluru
Workplace: OnsiteFull timeINR 4,860,800 - 6,944,000 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Verilog","ATPG","DFT","DFD","TCL","Perl","C++","Unix/Linux","Scripting"]

Lead DFx silicon design activities in a cross‑functional team, focusing on design-for-test (DFT) and design-for-debug (DFD) for complex SoCs. Execute RTL DFT/DFD design, integration, synthesis, and ATPG verification, develop CAD tools, and support first silicon bring-up. Collaborate across global teams to improve DFT/DFD flows and documentation.

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FursaFursa
AMD
AMD
2 months ago

Lead DFx Silicon Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live

Job Summary

Lead DFx silicon design activities in a cross‑functional team, focusing on design-for-test (DFT) and design-for-debug (DFD) for complex SoCs. Execute RTL DFT/DFD design, integration, synthesis, and ATPG verification, develop CAD tools, and support first silicon bring-up. Collaborate across global teams to improve DFT/DFD flows and documentation.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Manager level

Key Responsibilities

  • •Work with a multi-functional, cross-Geo team on DFt (design-for-test) and DFD (design-for-debug) architecture and methodology
  • •Perform DFT RTL design and integration based on architectural specifications and design generation flows
  • •Carry out DFT RTL integration, synthesis, equivalency checking, timing analysis and constraint definition; verify DFx logic at RTL and GLS
  • •Write and maintain DFT documentation and specifications
  • •Develop CAD software, scripts, and other tools to enable construction of DFT logics in complex SoC designs

Pay and Benefits

Salary: INR 4,860,800 - 6,944,000 annually

Key Requirements

  • •Design-for-test (DFT) RTL design and integration from architectural specifications
  • •Synthesis, equivalency checking, timing analysis, and constraint definition for DFx logic
  • •DFT/DFD documentation and specifications writing and maintenance
  • •Developing CAD software, scripts, and support tools to enable DFT logics in complex SoC designs
  • •Experience with Verilog simulators and waveform debugging tools; proficiency in RTL/gate-level debugging and UNIX/Linux scripting (e.g., TCL, Perl, C++)
Experience:SemiconductorASICDFTDFDSoCRTLATPG
Education:Bachelor's in Electrical/Electronic Engineering-
Skills:VerilogATPGDFTDFDTCLPerlC++Unix/LinuxScripting
Languages:English
Tech Stack:VerilogATPGDFTDFDTCLPerlC++Unix/LinuxScriptingSynthesisEDA tools

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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