Intel

4 weeks ago

Sr. EDA Tools Engineer - PERC ESD

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 57 minutes agoStatus: Live

Job Summary

Develop PERC ESD rule decks and reliability methodologies within Intel's Design Technology Platform to enable fast time-to-market on advanced process technologies. Collaborate with design, reliability, and CAD teams and external EDA vendors to implement new tool features, run tests, and automate QA for robust ESD/LU verification.

Location: United States

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements.
•Create and maintain reliability ESD and LU design rule methodologies and specifications.
•Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.
•Build and execute test cases for rule debugging, validation, and signoff.
•Define QA requirements and drive related automation to improve robustness and efficiency of rule checks.

Pay and Benefits

Salary: USD 149,600 - 284,580 annually

Key Requirements

•Master's degree or PhD in Electrical Engineering or Computer Engineering
•3+ years of relevant industry experience in physical design verification (reliability, device physics, process technology, and design rules, extraction or related domains)
•2+ years' experience with ESD PERC rule decks/runset development and debugging (or equivalent reliability/DRC tools)
•2+ years' experience in scripting (e.g., Python, Tcl, Perl, or similar) for QA and flow automation
•Strong knowledge of ESD/LU PreSi models (HBM, CDM), I/O design, and related methodologies

Experience:3+ yearsEDAPDKPERCESD

Education:Master's in Electrical Engineering

Skills:ScriptingEDAPERCESDPythonTclPerlAutomationQA

Languages:English

Tech Stack:PythonTclPerlESDDRMPDKEDA

Company Brief

Intel

Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor

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Intel

4 weeks ago

Sr. EDA Tools Engineer - PERC ESD

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 57 minutes agoStatus: Live

Job Summary

Location: United States

Workplace: Onsite

Employment Type: Full time

Job Function: Software Engineering

Key Responsibilities

•Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements.
•Create and maintain reliability ESD and LU design rule methodologies and specifications.
•Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.
•Build and execute test cases for rule debugging, validation, and signoff.
•Define QA requirements and drive related automation to improve robustness and efficiency of rule checks.

Pay and Benefits

Salary: USD 149,600 - 284,580 annually

Key Requirements

•Master's degree or PhD in Electrical Engineering or Computer Engineering
•3+ years of relevant industry experience in physical design verification (reliability, device physics, process technology, and design rules, extraction or related domains)
•2+ years' experience with ESD PERC rule decks/runset development and debugging (or equivalent reliability/DRC tools)
•2+ years' experience in scripting (e.g., Python, Tcl, Perl, or similar) for QA and flow automation
•Strong knowledge of ESD/LU PreSi models (HBM, CDM), I/O design, and related methodologies

Experience:3+ yearsEDAPDKPERCESD

Education:Master's in Electrical Engineering

Skills:ScriptingEDAPERCESDPythonTclPerlAutomationQA

Languages:English

Tech Stack:PythonTclPerlESDDRMPDKEDA

Company Brief

Intel

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor