Principal Firmware Engineer

Cadence Design Systems
Austin
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringSkills: ["C","Verilog","Shell","Perl","Python","TCL"]

Principle firmware engineer responsible for developing bare-metal firmware for DDR5 PHYs on microcontrollers, collaborating with hardware designers and memory architects to implement training algorithms, and debugging firmware across RTL simulations and silicon bring-up boards, leveraging C, scripting, and VERILOG-based verification to ensure high-speed memory interfaces perform reliably.

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Cadence Design Systems
Cadence Design Systems
6 months ago

Principal Firmware Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 12 hours agoStatus: Live

Job Summary

Principle firmware engineer responsible for developing bare-metal firmware for DDR5 PHYs on microcontrollers, collaborating with hardware designers and memory architects to implement training algorithms, and debugging firmware across RTL simulations and silicon bring-up boards, leveraging C, scripting, and VERILOG-based verification to ensure high-speed memory interfaces perform reliably.
Location: Austin
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Develop firmware for DDR5 PHY using microcontrollers and bare-metal programming with low-level APIs.
  • •Collaborate with hardware designers and memory subsystem architects to derive training algorithms and implement them.
  • •Collaborate with the verification team to deduce firmware-hardware co-verification plan.
  • •Develop and debug firmware in RTL based hardware simulations (C + Verilog simulations).
  • •Develop and debug on silicon bring-up boards.

Key Requirements

  • •Experience developing bare-metal firmware for High-speed SerDes or Memory interface Physical Layer blocks.
  • •Good Knowledge of C programming language for embedded software development and use of relevant IDE.
  • •Good Knowledge of DDR5 JEDEC spec, knowledge of different DIMM configurations and specifications.
  • •Comfortable debugging RTL simulations involving firmware and microcontroller subsystem.
  • •Good knowledge of Shell/Perl/Python/TCL scripting
Experience:SemiconductorsHardwareDDR5
Skills:CVerilogShellPerlPythonTCL
Languages:English
Tech Stack:CVerilogDDR5JEDECShell scriptingPythonPerlTCLEmbedded systems

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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