Senior ASIC Design Engineer
Santa Clara
Workplace: HybridFull timeUSD 136,000 - 218,500 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 3+ yearsEducation: bachelorsSkills: ["Verilog","SystemVerilog","Python","Perl","RTL","CAD tools","Timing analysis"]Join NVIDIA's Circuit Solutions Group as a Senior ASIC Design Engineer, shaping micro-architecture and RTL for IPs spanning hardware security, clocking, voltage regulation, and silicon correlation. Collaborate with architects and verification teams to deliver scalable designs using modern CAD tools, push timing, and support post-silicon bring-up. Hybrid role based in Santa Clara, contributing to AI-driven computing platforms and next-gen ASICs.
