Principal Product Engineer - Virtual Protocols

Cadence Design Systems
San Jose
Workplace: OnsiteFull timeFunction: Communications, PR & CommunityExperience: 7+ yearsEducation: bachelorsSkills: ["C++","C","Linux","SystemVerilog","VHDL","SystemC","Python","Shell","Perl","Make","GCC","Palladium","Protium","Emulation"]

Lead the development and deployment of Cadence Virtual Protocols’ emulation and verification solutions, enabling shift-left pre-silicon SOC verification for premier customers. Collaborate across R&D, field, and customers to define features and demonstrate performance, while expanding knowledge in software, hardware, and protocol interfaces on Palladium/Protium platforms.

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Cadence Design Systems
Cadence Design Systems
4 months ago

Principal Product Engineer - Virtual Protocols

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Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live

Job Summary

Lead the development and deployment of Cadence Virtual Protocols’ emulation and verification solutions, enabling shift-left pre-silicon SOC verification for premier customers. Collaborate across R&D, field, and customers to define features and demonstrate performance, while expanding knowledge in software, hardware, and protocol interfaces on Palladium/Protium platforms.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community

Key Responsibilities

  • •Developing, maintaining, and delivering feature-based training for new products/features
  • •Providing knowledge and guidance to customers and field teams to enable success using Cadence emulation platforms and products
  • •Deploying new and emerging protocol products to bleeding-edge customers working on advanced SoC and System designs
  • •Using OS/kernel/driver SW development expertise to support Cadence VirtualBridge products on Palladium/Protium platforms
  • •Leveraging verification methodologies and SW development expertise to help customers utilize Accelerated Verification IPs and APIs to accelerate pre-silicon verification

Key Requirements

  • •BS in Computer Science or Electrical Engineering with 7+ years of related experience or MS with 5+ years of related experience
  • •Proficiency in OS, kernel, and driver software development (C/C++), Linux kernel/driver development
  • •Strong protocol knowledge (PCIe, CXL, Ethernet, USB, AMBA) and hardware emulation experience
  • •HDL knowledge (SystemVerilog, VHDL) and scripting skills (shell, python, perl)
  • •Experience with verification methodologies (UVM SystemVerilog, SystemC, Portable Stimulus) and SOC design/verification preferred
Experience:7+ yearsSemiconductorsEmbeddedHardware-emulationVerificationsSoC
Education:Bachelor's
Skills:C++CLinuxSystemVerilogVHDLSystemCPythonShellPerlMakeGCCPalladiumProtiumEmulation
Languages:English
Tech Stack:C++CLinuxSystemVerilogVHDLSystemCPythonShellPerlMakeGCCPalladiumProtiumEmulation

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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Glassdoor: 3.9
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