FPGA/ASIC Design Engineer (Silicon Engineering)
SpaceX
Redmond, Irvine
Workplace: OnsiteFull timeUSD 125,000 - 175,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 1+ yearsEducation: bachelorsSkills: ["Verilog","SystemVerilog","VHDL","Python","C","C++","Bash","AXI","AHB","APB","Verilog/SystemVerilog","Xilinx Vivado","Altera Quartus II","VCS","Questa","IES","Spyglass"]Design and optimize ASICs and FPGAs for SpaceX’s Starlink projects, contributing to the full design lifecycle from architecture through validation. Collaborate with cross-functional teams and software engineers, and develop production software tooling to support on-orbit and lab verification of high-performance silicon.
