Staff Engineer, ASIC Physical Design

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["English proficiency","Collaboration","Interpersonal skills","Analytical skills","Problem-solving","Ownership","Time management"]

Own ASIC physical design for Enterprise SSD Group, working on processors, controller architectures, and ASICs. Drive low-power aware block implementation including floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, and tape-out readiness. Perform physical verification (DRC/LVS/Antenna/ERC), handle IR issues based on feedback, and contribute IR/EM analysis while collaborating across teams. Prefer experience with advanced 5nm/3nm process nodes and Cadence EDA flows.

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FursaFursa
Micron Technology
Micron Technology
2 months ago

Staff Engineer, ASIC Physical Design

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Source: Company careers pageValidated by: Fursa AI
Last checked: 19 hours agoStatus: Live

Job Summary

Own ASIC physical design for Enterprise SSD Group, working on processors, controller architectures, and ASICs. Drive low-power aware block implementation including floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, and tape-out readiness. Perform physical verification (DRC/LVS/Antenna/ERC), handle IR issues based on feedback, and contribute IR/EM analysis while collaborating across teams. Prefer experience with advanced 5nm/3nm process nodes and Cadence EDA flows.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Work on processors, controller architectures, or ASICs for Enterprise SSD Group.
  • •Perform low power aware physical design activities including floorplanning, placement, clock tree synthesis, routing, RC extraction, and STA timing closure.
  • •Drive physical verification closure activities including DRC/LVS/ERC and antenna checks, ensuring tape-out readiness.
  • •Conduct IR/EM analysis and close IR issues within blocks based on feedback.
  • •Support tape out activities and ensure strong execution of block-level physical design fundamentals.

Key Requirements

  • •Minimum 8 years of hands-on ASIC physical design implementation experience, including APR flow development and PPA analysis for block STA closure.
  • •Experience with advanced process technology nodes (5nm/3nm preferred).
  • •Hands-on proficiency with Cadence layout tools (Innovus, Tempus, etc.).
  • •Experience closing physical verification (DRC/LVS/Antenna) and tape-out readiness using Caliber tools.
  • •Ability to close IR issues within blocks based on feedback, with strong digital electronics fundamentals and analytical/problem-solving skills.
Experience:8+ yearsASIC physical designEDA tools
Education:Bachelor's in electronics and computer architecture
Skills:English proficiencyCollaborationInterpersonal skillsAnalytical skillsProblem-solvingOwnershipTime management
Languages:English
Tech Stack:ASICEnterprise SSDAPRPPASTACadence InnovusCadence TempusCadence PnRCaliberDRCLVSAntennaERCIR/EM analysisTape out

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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