Director, SoC Design Engineering

Intel
United States
Workplace: HybridFull timeUSD 220,920 - 311,890 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 12+ yearsEducation: bachelorsSkills: ["Mentorship","Technical leadership","Analytical skills","Debugging","Continuous improvement"]

Lead functional verification for advanced system-on-chip (SoC) designs, defining scalable, reusable verification strategies that drive first-pass silicon success. Own block/subsystem/SoC verification plans, coverage models, and verification closure for key interfaces (AXI, ACE, CHI). Collaborate across SoC architecture, RTL, and firmware teams to build reusable UVM-based methodologies and automation, while directing emulation and performance modeling on platforms like Palladium and Veloce.

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FursaFursa
Intel
Intel
3 months ago

Director, SoC Design Engineering

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Last checked: 10 hours agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Lead functional verification for advanced system-on-chip (SoC) designs, defining scalable, reusable verification strategies that drive first-pass silicon success. Own block/subsystem/SoC verification plans, coverage models, and verification closure for key interfaces (AXI, ACE, CHI). Collaborate across SoC architecture, RTL, and firmware teams to build reusable UVM-based methodologies and automation, while directing emulation and performance modeling on platforms like Palladium and Veloce.
Location: United States
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Director level

Key Responsibilities

  • •Architect and define end-to-end SoC verification strategies across simulation, emulation, and formal verification.
  • •Develop and execute verification plans for blocks, subsystems, and the SoC, including test benches and coverage models.
  • •Drive verification closure for critical interfaces, including AXI, ACE, CHI, and interconnect fabrics.
  • •Coordinate with SoC architects, RTL designers, and firmware teams on verification hooks, assertions, and coverage metrics.
  • •Lead reusable UVM-based verification methodologies and automation flows, including emulation and performance modeling and issue debugging/root-cause in pre-silicon.

Pay and Benefits

Salary: USD 220,920 - 311,890 annually
Equity and Bonus:Equity
Perks:Health InsuranceRetirementPaid Leave

Key Requirements

  • •Bachelor’s (or BS) in Electrical Engineering, Computer Engineering, or related field with 12+ years of relevant experience.
  • •5+ years of people management experience.
  • •Expertise in SystemVerilog and UVM/OVM verification methodologies.
  • •Strong SoC microarchitecture knowledge, including coherency protocols, cache subsystems, and interconnect fabrics.
  • •Hands-on experience with emulation/prototyping platforms (e.g., Palladium, Veloce, FPGA-based) and formal verification tools.
Experience:12+ yearsSemiconductorsSoC design
Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field
Skills:MentorshipTechnical leadershipAnalytical skillsDebuggingContinuous improvement
Tech Stack:SystemVerilogUVMOVMAXIACECHIInterconnect fabricsPCIe Gen6PCIe Gen7DDR5DDR6EthernetUVM-based verificationPalladiumVeloceFPGAFormal verificationScoreboardsMonitorsVIP integration

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
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