Staff Engineer - SerDes Verification

AMD
Singapore
Workplace: OnsiteFull timeSGD 90,300 - 129,000 annuallyFunction: Solutions Engineering & Sales EngineeringEducation: mastersSkills: ["Communication","Analytical thinking","Problem-solving","Collaboration"]

Build and run UVM/SystemVerilog verification testbenches for high-speed SerDes IPs and subsystems. Verify functional behavior and performance metrics including signal integrity, jitter, BER, and eye diagrams, while ensuring protocol compliance across interfaces such as UCIe and PCIe. Perform simulations, debug timing/protocol failures with RTL/firmware teams, and improve directed/random coverage using formal properties, assertions, and automated regression.

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FursaFursa
AMD
AMD
2 days ago

Staff Engineer - SerDes Verification

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Build and run UVM/SystemVerilog verification testbenches for high-speed SerDes IPs and subsystems. Verify functional behavior and performance metrics including signal integrity, jitter, BER, and eye diagrams, while ensuring protocol compliance across interfaces such as UCIe and PCIe. Perform simulations, debug timing/protocol failures with RTL/firmware teams, and improve directed/random coverage using formal properties, assertions, and automated regression.
Location: Singapore
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop and execute verification plans and verification testbenches for SerDes IPs and subsystems.
  • •Drive formal verification using formal properties and assertions to verify design correctness.
  • •Create directed and random tests, estimate test/environment effort, and manage functional/code coverage to meet requirements.
  • •Run simulations, analyze results, and debug timing and protocol errors in SerDes blocks with RTL/firmware engineers.
  • •Evaluate SerDes performance (jitter, BER, signal integrity, eye diagrams) and perform protocol compliance testing; collaborate across teams and document results.

Pay and Benefits

Salary: SGD 90,300 - 129,000 annually

Key Requirements

  • •Develop and execute verification plans and testbenches for SerDes IPs and subsystems to meet functional and performance requirements.
  • •Strong hands-on experience with verification methodologies such as UVM and SystemVerilog (and/or VHDL/Verilog).
  • •Experience with high-speed serial protocols including UCIe, PCIe, Ethernet, USB, DDR, DisplayPort, or custom protocols.
  • •Ability to analyze signal integrity issues, jitter, BER, and eye diagrams and debug timing/protocol failures to root cause.
  • •Bachelors or Masters degree in Computer Engineering or Electrical Engineering.
Experience:High-speed communication verificationSerDes verification
Education:Master's in Computer Engineering / Electrical Engineering
Skills:CommunicationAnalytical thinkingProblem-solvingCollaboration
Tech Stack:UVMSystemVerilogVHDLVerilogFormal verificationAssertionsUCIePCIeEthernetUSBDDRDisplayPortCustom protocolsPythonPerlRegression testing

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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