Hardware - Silicon Validation Team Lead (NPU SoC)

FuriosaAI
Seoul
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceSkills: ["Leadership","Mentoring","Cross-functional communication","Debugging","Problem-solving"]

Lead silicon validation for NPU SoCs, driving end-to-end bring-up from first silicon through system-level performance optimization and stability. Own validation methodology and test planning across pre- and post-silicon environments, develop bare-metal test firmware, and perform HW/SW co-debugging to derive fixes and workarounds. Support performance validation, enable test automation with CI/CD integration, and partner with design, DV, firmware, software, and QA teams.

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FursaFursa
FuriosaAI
FuriosaAI
2 weeks ago

Hardware - Silicon Validation Team Lead (NPU SoC)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 39 minutes agoStatus: Live

Job Summary

Lead silicon validation for NPU SoCs, driving end-to-end bring-up from first silicon through system-level performance optimization and stability. Own validation methodology and test planning across pre- and post-silicon environments, develop bare-metal test firmware, and perform HW/SW co-debugging to derive fixes and workarounds. Support performance validation, enable test automation with CI/CD integration, and partner with design, DV, firmware, software, and QA teams.
Location: Seoul
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance
Seniority: Manager level

Key Responsibilities

  • •Drive NPU 1st silicon bring-up for accelerator cores and key blocks (CPU subsystem, NoC), including memory subsystem and high-speed interface integration verification.
  • •Establish and execute validation methodology: build test plans for emulator/FPGA and post-silicon, manage coverage, and develop bare-metal test firmware and scenarios for each IP.
  • •Lead system-level issue debugging at the HW/SW boundary using tools like JTAG and Trace32, and define workarounds and reporting to relevant teams.
  • •Support performance validation and optimization, including verification of NPU data processing pipelines and memory bandwidth performance.
  • •Improve validation efficiency through test automation by writing automation scripts and building CI/CD-connected verification environments.

Key Requirements

  • •Lead NPU generation bring-up and validation roadmap planning with schedule management.
  • •Demonstrate cross-functional collaboration and technical decision leadership across design, DV, firmware, software, and QA.
  • •Build and mentor the team, establishing verification methodology and improving members’ technical capability.
  • •Bring experience in SoC/ASIC or complex silicon/system validation at a leader or senior level.
  • •Use ARM/AMBA (AXI/AHB) and have validation methodology experience from test plan through bug tracking and coverage.
Experience:SoCASICSilicon validationSystem validationNPU
Skills:LeadershipMentoringCross-functional communicationDebuggingProblem-solving
Tech Stack:Embedded C/C++RustBare-metalARM ArchitectureAMBAAXIAHBSoC/컴퓨터 구조JTAGTrace32EmulatorFPGAPalladiumZebuTest FirmwareBooting SequenceClock/Reset configurationLPDDRHBMEthernet

Company Brief

FuriosaAI
Designs and develops data‑center AI inference accelerators (RNGD) and a full stack hardware‑software platform to deliver energy‑efficient, high‑performance AI compute for enterprise and cloud customers.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Scaleup
Valuation: USD 500M to 1B
Funding: Series C
Headquarters: Seoul, South Korea
Founded: 2017
Glassdoor
Glassdoor: 4.6
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