Staff Engineer, Scribe Layout Design
Support R&D Scribe Design test structure development by designing scribe test structures and managing scribe databases. Partner with process integration, advanced mask development, product/design, mask shop, and electrical characterization teams to create standardized and novel memory cell/pitch test structures. Build and maintain EDA automation flows (DUT generation, layout creation/verification, documentation), develop PCELL-based CMOS device layouts, and use EDA scripting (SKILL/Python/Perl/Tcl) in Linux to automate DUT layout generation, routing, and validation. Mentor engineers and drive continuous improvement via metrics.
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