Physical Design Engineer

AMD
Bengaluru
Workplace: OnsiteFull timeINR 3,338,160 - 4,768,800 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsSkills: ["Analytical skills","Communication skills","Ability to learn quickly","Team player","Attention to details"]

Drive physical design execution for ASIC solutions, optimizing power/performance area for AECG customers. Own the RTL-to-GDS2 flow, including floorplanning, power planning, synthesis, placement, CTS, timing closure, routing, parasitic extraction, and physical verification (DRC/LVS), plus signoff and verification quality checks. Use PNR and analysis tools across the full design lifecycle, and develop scripts/flow improvements while identifying and solving complex physical design problems.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
AMD
AMD
17 hours ago

Physical Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live

Job Summary

Drive physical design execution for ASIC solutions, optimizing power/performance area for AECG customers. Own the RTL-to-GDS2 flow, including floorplanning, power planning, synthesis, placement, CTS, timing closure, routing, parasitic extraction, and physical verification (DRC/LVS), plus signoff and verification quality checks. Use PNR and analysis tools across the full design lifecycle, and develop scripts/flow improvements while identifying and solving complex physical design problems.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Implement the RTL to GDS2 flow for ASIC physical design.
  • •Handle floorplanning and physical implementation tasks, including power planning, synthesis, placement, CTS, and timing closure.
  • •Execute routing, parasitic extraction, and physical verification (DRC & LVS), plus crosstalk analysis and EM/IR checks.
  • •Perform full-chip level tasks such as bus/pin planning, feed-thru planning, clock tree synthesis, static timing analysis, and signoff.
  • •Identify complex technical problems, break them down into solution options, and drive hands-on flow development and scripting.

Pay and Benefits

Salary: INR 3,338,160 - 4,768,800 annually

Key Requirements

  • •8+ years of professional experience in physical design, preferably for high-performance designs.
  • •Experience implementing automated synthesis and timing-driven place-and-route for RTL blocks (high-speed datapath and control logic).
  • •Hands-on expertise with RTL-to-GDS2 flow, including clock tree synthesis, clock/power gating, and design optimization for timing/power/area.
  • •Strong floorplanning and methodology experience, including IP integration, logic equivalence checks, and physical/timing/electrical quality signoff.
  • •Bachelors or Masters degree in computer engineering or Electrical Engineering.
Experience:8+ yearsHigh performance designsASICFinFETDual Patterning
Education:
Skills:Analytical skillsCommunication skillsAbility to learn quicklyTeam playerAttention to details
Languages:En-us
Tech Stack:RTLGDS2FloorplanningPhysical implementationPower planSynthesisPlacementCTSTiming closureRoutingExtractionPhysical verificationDRCLVSCrosstalk analysisEM/IRFormal equivalencePNR toolsSynopsys Fusion CompilerICC2

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn