High Speed AMS - ASIC Engineering Technical Leader

Cisco
Bengaluru
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringSkills: ["Technical leadership","Cross-team collaboration","Mentoring","Debugging complex systems","Design for testability"]

Lead full-chip electrical specifications and mixed-signal design for Cisco’s silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda optical modules. Own high-speed datapath and low-speed control circuit design, author designs for modulator drivers, serializers, PLLs, TIAs, and control circuits, and optimize for power, performance, testability, and cost. Drive verification plans, debug bring-up issues, improve yield, and mentor engineers across electrical, optical, and product teams.

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FursaFursa
Cisco
Cisco
4 days ago

High Speed AMS - ASIC Engineering Technical Leader

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Job Summary

Lead full-chip electrical specifications and mixed-signal design for Cisco’s silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda optical modules. Own high-speed datapath and low-speed control circuit design, author designs for modulator drivers, serializers, PLLs, TIAs, and control circuits, and optimize for power, performance, testability, and cost. Drive verification plans, debug bring-up issues, improve yield, and mentor engineers across electrical, optical, and product teams.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Provide technical leadership in analog/mixed-signal design for next-generation silicon photonics driver integrated circuits for 100G/200G/400G per Lambda solutions.
  • •Lead full-chip electrical specifications, circuit design, and verification test plans from concept through production while coordinating across electrical, optical, and product teams.
  • •Author mixed-signal datapath designs including photonics modulator drivers, serializers, PLLs, TIAs, and control circuits, optimizing for power, performance, testability, and cost.
  • •Debug complex silicon and system-level issues during bring-up and lab validation to drive yield enhancements and failure analysis.
  • •Mentor and guide analog, digital, and validation engineers and collaborate on verification and testability strategies with architecture and product teams.

Key Requirements

  • •Bachelors +12 years, or Masters +8 years, or PhD +5 years of related high-speed AMS/analog-mixed signal design experience.
  • •Expertise in high-speed optical transceiver design (modulator drivers, TIA, CDR, PLLs, ADC/DAC) and industry-standard tools including Cadence Virtuoso, Spectre, Caliber, SystemVerilog, and Verilog-AMS.
  • •Ability to lead design teams through a full tapeout cycle and make critical decisions to deliver successful silicon products.
  • •Proficiency in Python or C for design automation, scripting, and analytical tools.
  • •Demonstrated experience developing mixed-signal datapath designs and/or verification test plans from concept through production.
Experience:Optical transceiversSilicon photonicsASIC designMixed-signal designHigh-speed SerDesData center networking
Skills:Technical leadershipCross-team collaborationMentoringDebugging complex systemsDesign for testability
Tech Stack:Cadence VirtuosoSpectreCaliberSystemVerilogVerilog-AMSVerilog-APythonCTIAsCDRPLLsADC/DACSerDesQSFPQSFP-DDIEEE 802.3BERTsReal-time scopesSI/PITest fixture/PCB

Company Brief

Cisco
Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1984
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