Senior Engineer - CMOS & Metallization Test Structure Design and Layout

Micron Technology
Mexico
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Problem-solving","Strong people skills","Global mindset","Ownership"]

Design, layout, and verify electrical test structures that enable CMOS device development, including compact modeling, reliability, modeling, and fab process monitoring. Build and validate completed test element groups (TEGs) from DUT definitions, debug for build accuracy, and support parametric correlation. Collaborate with cross-functional teams across process integration, characterization, and advanced mask development, leveraging AI to reduce development time.

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Micron Technology
Micron Technology
1 month ago

Senior Engineer - CMOS & Metallization Test Structure Design and Layout

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Source: Company careers pageValidated by: Fursa AI
Last checked: 18 hours agoStatus: Live

Job Summary

Design, layout, and verify electrical test structures that enable CMOS device development, including compact modeling, reliability, modeling, and fab process monitoring. Build and validate completed test element groups (TEGs) from DUT definitions, debug for build accuracy, and support parametric correlation. Collaborate with cross-functional teams across process integration, characterization, and advanced mask development, leveraging AI to reduce development time.
Location: Mexico
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Support process development by delivering memory cell-based test structure solutions with Process Integration, Product and Design, Electrical Characterization, and Advanced Mask Development and Design Rule teams.
  • •Interpret DUT definitions and build completed test element groups (TEGs) on silicon with high-confidence functionality.
  • •Implement novel solutions to study failure mechanisms and monitor silicon health.
  • •Assist with parametric correlation and debug to ensure build accuracy and document verification.
  • •Verify and validate test structure documentation and related parametric information.

Key Requirements

  • •Bachelor of Science in Electrical or Microelectronic Engineering with 5 years of experience.
  • •Hands-on EDA tool proficiency including Cadence Virtuoso Layout and Schematic Editor and Calibre.
  • •Strong circuit build, layout, schematic, and verification skills (DRC, LVS, and circuit simulation using HSPICE).
  • •Strong knowledge of semiconductor device physics, parametric testing, and Design for Manufacturability (DFM).
  • •Knowledge of DRAM and NAND memory array design architectures, fab processes, and failure modes.
Experience:5+ yearsSemiconductorsCMOSDRAMNANDFab processes
Education:Bachelor's in Electrical or Microelectronic Engineering
Skills:Problem-solvingStrong people skillsGlobal mindsetOwnership
Tech Stack:Cadence Virtuoso Layout and Schematic EditorCalibreDRCLVSHSPICEPerlSKILLUNIX shell scriptingEDA toolsAI

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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