Senior Pre-Silicon Verification Engineer

Own mixed-signal pre-silicon verification for complex analog and digital designs, building verification strategies, behavioral models, and scalable environments. Develop IP verification plans and test benches, run regression with continuous integration, and execute system-level simulations across PVT corners. Debug failing tests in the pre-silicon environment, analyze power/timing/performance metrics, and partner with architects, RTL developers, and physical design teams to ensure functional, performance, and power requirements are met before fabrication.