Silicon Design Engineer

AMD
Shanghai, Beijing
Workplace: OnsiteFull timeCNY 297,570 - 425,100 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Collaboration","Debugging","Problem-solving","Leadership","Mentoring"]

Lead formal verification for advanced ASIC/FPGA IP blocks, using state-of-the-art formal property verification techniques to validate design intent, security properties, and complex control/packet behavior. Collaborate with architects and designers, create and debug properties, optimize runtime, and drive counter-example-based resolution. Coordinate verification activities for a small team, improve formal setups and procedures, and support junior engineers while leveraging AI to broaden formal verification across multiple IP blocks.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
AMD
AMD
1 day ago

Silicon Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Lead formal verification for advanced ASIC/FPGA IP blocks, using state-of-the-art formal property verification techniques to validate design intent, security properties, and complex control/packet behavior. Collaborate with architects and designers, create and debug properties, optimize runtime, and drive counter-example-based resolution. Coordinate verification activities for a small team, improve formal setups and procedures, and support junior engineers while leveraging AI to broaden formal verification across multiple IP blocks.
Location: Shanghai, Beijing
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Manager level

Key Responsibilities

  • •Collaborate with architects and designers to understand design intent.
  • •Create and execute formal verification plans for design blocks.
  • •Write and debug properties, analyze counter-examples, and drive resolution of issues.
  • •Optimize runtime using formal techniques and improve formal setups based on review feedback and metrics.
  • •Lead and coordinate verification activities for a small team, training and coaching junior engineers; develop procedures/flows/infra and apply AI to assist formal verification workflows.

Pay and Benefits

Salary: CNY 297,570 - 425,100 annually

Key Requirements

  • •BS (or higher) degree in Electronics/Electrical or Computer Engineering (desired).
  • •Strong background in formal property verification, including sequential equivalence checking and/or academic formal methods.
  • •Expertise in a formal property language (SVA preferred), abstraction techniques, and formal sign-off using commercial formal tools (e.g., VC-Formal, JasperGold, Questa Formal).
  • •Experience verifying complex packet/control designs and familiarity with high-speed protocols such as PCIe and AXI.
  • •Design or verification experience in ASIC or FPGA, including hardware-firmware interaction (AI-assisted verification skills are a plus).
Education:Bachelor's in Electronics/Electrical or Computer Engineering
Skills:CollaborationDebuggingProblem-solvingLeadershipMentoring
Languages:English
Tech Stack:Formal verificationFormal property verificationSVASequential equivalence checkingVC-FormalJasperGoldQuesta FormalPCIeAXIASICFPGA

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn