SoC Digital Verification Engineer, Multimedia Lab

ByteDance
Singapore
Workplace: OnsiteFull timeFunction: Creative Production (Video/Audio/Photo)Experience: 3+ yearsEducation: bachelorsSkills: ["Debugging","Logical analysis","Automation","Problem-solving"]

Build and execute comprehensive verification test plans for module, subsystem, and SoC-level designs supporting video codec hardware solutions. Create automated, reusable verification environments using UVM, develop constrained-random and directed testcases, and drive functional and code coverage to 100%. Own gate-level and timing simulations, support FPGA prototyping and hardware/software co-debugging, and optimize regression automation to improve verification efficiency.

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FursaFursa
ByteDance
ByteDance
1 month ago

SoC Digital Verification Engineer, Multimedia Lab

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 30 days agoStatus: Live
Reposted: similar role first listed 1 month ago

Job Summary

Build and execute comprehensive verification test plans for module, subsystem, and SoC-level designs supporting video codec hardware solutions. Create automated, reusable verification environments using UVM, develop constrained-random and directed testcases, and drive functional and code coverage to 100%. Own gate-level and timing simulations, support FPGA prototyping and hardware/software co-debugging, and optimize regression automation to improve verification efficiency.
Location: Singapore
Workplace: Onsite
Employment Type: Full time
Job Function: Creative Production (Video/Audio/Photo)
Seniority: Mid level

Key Responsibilities

  • •Analyze architecture and design specs to create high-coverage test plans at module/subsystem/SoC levels.
  • •Build or maintain reusable automated verification environments and components using UVM.
  • •Develop and run constrained-random and directed testcases to achieve functional and code coverage closure.
  • •Own gate-level simulation (GLS) and SDF back-annotated timing simulation; support FPGA prototyping and HW/SW co-debugging on emulation platforms.
  • •Develop and maintain regression scripts and automation tools to improve verification efficiency and compute utilization.

Key Requirements

  • •Bachelor’s degree or higher in Microelectronics, Computer Science, Electronic Communications, or a related field.
  • •3+ years of ASIC/SoC verification experience.
  • •Mastery of SystemVerilog and UVM, with ability to build IP-level or SoC-level verification environments.
  • •Proficiency with simulation and debugging tools such as VCS/Incisive/Questa and Verdi.
  • •Strong debugging and logical analysis skills, plus scripting proficiency in Python/Perl/Shell for automation.
Experience:3+ years
Education:Bachelor's
Skills:DebuggingLogical analysisAutomationProblem-solving
Tech Stack:SystemVerilogUVMASICSoCFPGAGLSSDFTestbenchVCSIncisiveQuestaVerdiPythonPerlShellConstrained RandomDirected TestingEmulationPalladiumZeBu

Company Brief

ByteDance
Develops consumer internet and content platforms, including TikTok and other apps for short-form video, news, and entertainment. It also builds advertising, commerce, and creator tools that connect audiences, brands, and publishers across global markets.
Industry: Digital Media
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Established Company
Headquarters: Beijing, China
Founded: 2012
WebsiteLinkedIn