Senior Digital PD Engineer

Texas Instruments
Bengaluru
Workplace: OnsiteFull timeFunction: Solutions Engineering & Sales EngineeringExperience: 12+ yearsEducation: bachelorsSkills: ["Communication","Collaboration","Technical leadership"]

Own the physical design strategy and drive end-to-end RTL-to-GDSII implementation for high-speed digital and mixed-signal communication chips. Lead timing, reliability, and physical verification closure (STA, EM/IR drop, DRC/LVS), optimize PPA, and strengthen clock/reset/DFT integrity. Collaborate with EDA, library, memory, and IP teams to remove flow bottlenecks, qualify new tools and process nodes, and mentor engineers across TI’s physical design community.

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FursaFursa
Texas Instruments
Texas Instruments
1 day ago

Senior Digital PD Engineer

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Last checked: 7 hours agoStatus: Live

Job Summary

Own the physical design strategy and drive end-to-end RTL-to-GDSII implementation for high-speed digital and mixed-signal communication chips. Lead timing, reliability, and physical verification closure (STA, EM/IR drop, DRC/LVS), optimize PPA, and strengthen clock/reset/DFT integrity. Collaborate with EDA, library, memory, and IP teams to remove flow bottlenecks, qualify new tools and process nodes, and mentor engineers across TI’s physical design community.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Own the strategic direction of physical design, setting methodologies, quality benchmarks, and technical judgments for next-generation products.
  • •Drive global design governance by owning sign-off for the complete flow from RTL to GDSII and setting quality standards for digital backend projects.
  • •Lead end-to-end physical design lifecycle execution, including floorplanning, placement, CTS, routing, and full-chip implementation.
  • •Ensure timing and reliability closure using STA and deliver closure for EM, IR drop, and physical verification (DRC/LVS).
  • •Collaborate with EDA, library, memory, and IP teams to eliminate flow bottlenecks, qualify new tools and process nodes, and mentor engineers.

Key Requirements

  • •12+ years of hands-on Physical Design / Digital Backend implementation experience.
  • •Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, or VLSI Design.
  • •Proven expertise in RTL-to-GDSII flows using industry-standard EDA tools (Synopsys and/or Cadence).
  • •Ability to own and deliver complex designs independently from specification through signoff.
  • •Deep knowledge of timing closure, power integrity, signal integrity, and physical verification (DRC/LVS/ERC).
Experience:12+ years
Education:Bachelor's
Skills:CommunicationCollaborationTechnical leadership
Tech Stack:RTLRTL-to-GDSIIGDSIISynopsysCadenceStatic Timing Analysis (STA)DRC/LVSERCDFTTclPythonPerlFloorplanningPlacementCTSRoutingStatic Timing Analysis

Company Brief

Texas Instruments
Designs and manufactures semiconductors and analog chips used in industrial, automotive, personal electronics, communications, and enterprise systems. It is one of the world’s largest semiconductor companies, with a broad portfolio of embedded processing and power products.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Dallas, United States
Founded: 1930
WebsiteLinkedIn