Design Verification Engineer Graduate (Video Silicon IP) - 2026 Start (BS/MS)
ByteDance
San Jose
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: ["Technical excellence","Collaboration","Problem-solving"]Help deliver a Video Codec IP by building test benches and running simulations for advanced video encoding and processing accelerators targeting FPGA/ASIC. Work closely with architects and ASIC/FPGA design engineers to create test plans, track and fix bugs, automate regression testing, and drive functional coverage closure. Join a cross-disciplinary team (algorithm, architecture, software, firmware, and hardware verification) and develop verification expertise using UVM/OVM-based methodologies.

