ASIC Architect R&D (F/H) (Échirolles, FR)

Atos
Grenoble, Sophia Antipolis
Workplace: OnsiteFull timeFunction: Architecture & Urban PlanningExperience: 5+ yearsEducation: mastersSkills: ["Verilog","VHDL","SystemC","C","C++","Python","RTL","Ethernet","Infiniband","RDMA","HPC","ASIC","SystemVerilog","Verilog-A"]

Lead the design and validation of next-generation ASICs for HPC and AI workloads, collaborating with RTL, verification and software teams to deliver high-performance interconnect and processing solutions. Define features with hardware/software architects, assess performance and cost projections, and document architecture while ensuring scalable, silicon-efficient implementations.

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Atos
Atos
6 months ago

ASIC Architect R&D (F/H) (Échirolles, FR)

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Job Summary

Lead the design and validation of next-generation ASICs for HPC and AI workloads, collaborating with RTL, verification and software teams to deliver high-performance interconnect and processing solutions. Define features with hardware/software architects, assess performance and cost projections, and document architecture while ensuring scalable, silicon-efficient implementations.
Location: Grenoble, Sophia Antipolis
Workplace: Onsite
Employment Type: Full time
Job Function: Architecture & Urban Planning

Key Responsibilities

  • •Analyze IA/HPC use-case requirements, bottlenecks, technology trends and competitive landscape to propose features for next-generation HPC applications on a high-performance cluster
  • •Lead innovations in RDMA-based Ethernet/HPC technologies beyond state of the art and propose cost-effective solutions
  • •Create innovative, highly competitive solutions for client problems within technological and budget constraints
  • •Prepare performance projections and cost evaluations to support decision-making at each project stage
  • •Provide clear, high-quality architecture specifications and drive architecture quality assurance while working closely with RTL, verification and software teams to optimize ASIC design flow

Key Requirements

  • •Bachelor-level or higher education (Bac+5) in engineering or university program
  • •5+ years of hardware development experience, preferably in HPC or data center contexts
  • •Strong knowledge of high-scale distributed workloads (e.g., AI training, scientific simulation) and architecture design that solves client problems
  • •Experience with RTL design (Verilog, VHDL) and SystemC, C, C++, Python demonstrations or prototyping
  • •Excellent communication skills and ability to collaborate with RTL, verification, and software teams; English proficiency; French a plus
Experience:5+ yearsHPCDatacenterAIIA
Education:Master's
Skills:VerilogVHDLSystemCCC++PythonRTLEthernetInfinibandRDMAHPCASICSystemVerilogVerilog-A
Languages:EnglishFrench
Tech Stack:VerilogVHDLSystemCCC++PythonEthernetInfinibandRDMAHPCASICSystemVerilog

Company Brief

Atos
Global digital services and consulting firm delivering cloud, cybersecurity, big data, digital workplace, and managed services to enterprise and public sector clients. Provides IT transformation, systems integration, and outsourcing solutions worldwide.
Industry: Consulting
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Bezons, France
Founded: 1997
WebsiteLinkedIn