EDA Design Flow Development Engineer
Intel
Santa Clara, Austin
Workplace: HybridFull timeUSD 141,910 - 269,100 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 6+ yearsEducation: bachelorsSkills: ["EM/IR","Parasitic extraction","Linux","Scripting","Automation","SPICE","Power integrity","Parasitic","Cad tooling","EM/IR tools","Redhawk","Totem","Linux scripting"]Develop and maintain transistor-level EM/IR analysis flows for Intel's advanced nodes, collaborating with circuit, physical design, and reliability teams. Build CAD methodologies, automation infrastructure, and silicon-correlation workflows to enable scalable power integrity verification for custom IPs, SRAMs and analog/mixed-signal interfaces. Proficiency with SPICE, Linux scripting, and industry EM/IR tools is essential.
