LVS Runset Development Engineer

Intel
Bengaluru
Workplace: OnsiteFull timeFunction: Solutions Engineering & Sales EngineeringSkills: ["Debugging","Problem-solving","Teamwork","Cross-functional collaboration","Automation"]

Develop and validate LVS rule decks for Intel’s semiconductor process, working with the PDK and foundry teams to ensure design compliance. Own LVS/extraction runset development and QA support, building optimized verification flows across ICV, Calibre, and Pegasus with consistent results. Partner with device physicists and design teams to debug LVS issues, automate runs and reporting with scripting, and maintain guidelines for correct-by-construction layouts.

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FursaFursa
Intel
Intel
2 days ago

LVS Runset Development Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 12 hours agoStatus: Live

Job Summary

Develop and validate LVS rule decks for Intel’s semiconductor process, working with the PDK and foundry teams to ensure design compliance. Own LVS/extraction runset development and QA support, building optimized verification flows across ICV, Calibre, and Pegasus with consistent results. Partner with device physicists and design teams to debug LVS issues, automate runs and reporting with scripting, and maintain guidelines for correct-by-construction layouts.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Solutions Engineering & Sales Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop and provide QA support for LVS/extraction runsets for Intel’s process.
  • •Develop and optimize verification flows across ICV, Calibre, and Pegasus, ensuring consistency of results.
  • •Collaborate with PDK, foundry, device physicists, process integration engineers, and analog designers to implement LVS runsets and ensure compliance.
  • •Support design teams by debugging and analyzing LVS issues.
  • •Automate execution, reporting, and tracking across design versions using scripts (Python, SKILL, Tcl, or Perl) and maintain documentation/guidelines for correct-by-construction layouts.

Key Requirements

  • •Experience with LVS runset development.
  • •Familiarity with SVRF, TVF, and Python or Tcl scripting.
  • •Strong debugging and problem-solving skills for LVS issues.
  • •Knowledge of Linux and scripting (Python/Shell/Tcl) is desirable.
  • •Bachelor’s (10+ years), Master’s (8+ years), or PhD (2+ years) experience in LVS runset development or related semiconductor field; advanced technology node experience is an advantage.
Experience:Semiconductor industryAdvanced technology nodes
Skills:DebuggingProblem-solvingTeamworkCross-functional collaborationAutomation
Tech Stack:LVSRule decksSVRFTVFPythonTclPerlShellLinuxICVCalibrePegasusEDASVRF/TVF verification flows

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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Glassdoor: 3.8
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