CPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG)

Intel
Penang
Workplace: HybridContractFunction: Design (Product/UX/UI/Visual)Education: certificationSkills: ["SystemVerilog","Unix","VLSI","SoC","CPU Architecture"]

Diploma-level contract role in Intel's Silicon Engineering Group in Penang, focusing on training and hands-on design for next-generation SOC/CPU mask layouts. You will create IC mask layouts, run verification tools for design rules and reliability checks, analyze floorplans and power grids, troubleshoot layouts, and collaborate with internal and external stakeholders to drive project progress.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Intel
Intel
4 months ago

CPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 13 hours agoStatus: Live

Job Summary

Diploma-level contract role in Intel's Silicon Engineering Group in Penang, focusing on training and hands-on design for next-generation SOC/CPU mask layouts. You will create IC mask layouts, run verification tools for design rules and reliability checks, analyze floorplans and power grids, troubleshoot layouts, and collaborate with internal and external stakeholders to drive project progress.
Location: Penang
Workplace: Hybrid
Employment Type: Contract
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Creates mask layouts of integrated circuits for a given specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts.
  • •Creates accurate designs that meet project needs, applying understanding of design manuals, established processes, layout elements, and basic electronic principles.
  • •Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.
  • •Designs and analyses floorplans, power grid, and bumps and performs all required verification on the layout blocks.
  • •Troubleshoots a wide variety of issues up to and including layouts and tool/flow/methodology used in layout design.

Key Requirements

  • •Diploma in Electrical and Electronic Engineering or related fields
  • •Strong technical fundamentals and good communication skills, proficiency in English
  • •Curious, motivated, and eager to grow in semiconductor design
  • •Familiarity with Unix, VLSI, SoC/CPU Architecture, or SystemVerilog is a plus
  • •Candidates must be open to contract-based position
Experience:SemiconductorSilicon
Education:Certification / Diploma
Skills:SystemVerilogUnixVLSISoCCPU Architecture
Languages:English
Tech Stack:SystemVerilogUnixVLSISoCCPU Architecture

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
WebsiteLinkedInGlassdoor