Design-for-Test (DFT) Engineer-Singapore

Join the Silicon Platform team to deliver Design-for-Test (DFT) work across SoC chips, covering scan and memory test methodologies. You’ll partner with STA, physical design, and power engineers to debug DFT timing and Power/IR issues, and work with test engineers to bring up silicon test vectors successfully. The role spans the full chip design flow, from DFT principles through tape-out and board-level verification.