SR ENGINEER, DDEG DESMETH DFT

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: QA, Test & Release EngineeringSkills: []

Develop verification infrastructure and environments for probe and burn DFT test modes, including porting DFT patterns into the verification flow. Support DRAM and emerging memory design teams by simulating, analyzing, and debugging pre-silicon full-chip and block-level designs. Create SystemVerilog testbench infrastructure with UVM and constrained-random verification, run regressions, close coverage, automate simulation data collection, and maintain in-house verification tools and vectors.

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Micron Technology
Micron Technology
2 months ago

SR ENGINEER, DDEG DESMETH DFT

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Source: Company careers pageValidated by: Fursa AI
Last checked: 18 hours agoStatus: Live

Job Summary

Develop verification infrastructure and environments for probe and burn DFT test modes, including porting DFT patterns into the verification flow. Support DRAM and emerging memory design teams by simulating, analyzing, and debugging pre-silicon full-chip and block-level designs. Create SystemVerilog testbench infrastructure with UVM and constrained-random verification, run regressions, close coverage, automate simulation data collection, and maintain in-house verification tools and vectors.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop verification infrastructure and environments to verify probe and burn DFT test modes functionality.
  • •Port DFT probe/burn patterns into the verification flow and support DRAM and emerging memory design teams with simulation-based debugging.
  • •Develop SystemVerilog testbench infrastructure (UVM/Non-UVM and constrained random verification methodology).
  • •Run test plans and regressions, and drive code and functional coverage closure.
  • •Automate simulation data collection and maintain in-house verification programs/tools, vectors, and monitors to improve coverage and debug efficiency.

Key Requirements

  • •Develop verification infrastructure and environments for probe and burn DFT test modes and functionality verification.
  • •Port DFT patterns into the verification flow and provide verification support through simulation, analysis, and debugging of pre-silicon full-chip and block-level designs.
  • •Build SystemVerilog verification testbench infrastructure using UVM/Non-UVM and constrained-random verification methodologies.
  • •Execute test plans and run regressions to achieve code and functional coverage closure.
  • •Write and maintain verification test benches, vectors, monitors, and supporting scripts/programs to improve debug efficiency and coverage.
Experience:DRAMEmerging memoryPre-siliconSemiconductors
Tech Stack:System VerilogUVMConstrained random verificationDFTSimulationRegressionsFunctional coverageCode coverageUVM/Non-UVM

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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