RTL Power Optimization Engineer – New College Grad 2026

NVIDIA
Santa Clara
Workplace: OnsiteFull timeUSD 116,000 - 218,500 annuallyFunction: Energy & Utilities OperationsEducation: phdSkills: ["Written and verbal communication"]

Work on power optimization for NVIDIA GPUs and networking chips across data center, gaming, and automotive workloads. You’ll use pre-silicon RTL/gate-level power analysis tools plus internally developed tooling to analyze and reduce energy, apply AI/ML to deliver power optimization solutions, and collaborate with architects, RTL designers, and physical design teams to interpret findings and drive fixes.

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NVIDIA
NVIDIA
1 month ago

RTL Power Optimization Engineer – New College Grad 2026

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Last checked: 6 hours agoStatus: Live

Job Summary

Work on power optimization for NVIDIA GPUs and networking chips across data center, gaming, and automotive workloads. You’ll use pre-silicon RTL/gate-level power analysis tools plus internally developed tooling to analyze and reduce energy, apply AI/ML to deliver power optimization solutions, and collaborate with architects, RTL designers, and physical design teams to interpret findings and drive fixes.
Location: Santa Clara
Workplace: Onsite
Employment Type: Full time
Job Function: Energy & Utilities Operations
Seniority: Graduate level

Key Responsibilities

  • •Use internally developed tools and industry-standard pre-silicon gate-level and RTL power analysis tools to improve product power efficiency.
  • •Apply AI to deliver RTL and/or architecture power optimization solutions.
  • •Develop and share best practices for performing pre-silicon power analysis.
  • •Perform comparative power analysis to identify trends and anomalies requiring deeper scrutiny.
  • •Interact with architects and RTL designers to interpret power data, identify power bugs, and drive implementation of fixes.

Pay and Benefits

Salary: USD 116,000 - 218,500 annually
Equity and Bonus:Equity
Perks:Equity

Key Requirements

  • •Pursuing or recently completed an MS or PhD in Electrical Engineering, Computer Engineering, or a related field, with coursework or experience in AI, Digital Design, and VLSI concepts (or equivalent experience).
  • •Understanding of RTL power optimization fundamentals including switching activity, clock/enable efficiency, and low-power RTL design patterns.
  • •Knowledge of backend flows such as logic synthesis and place-and-route, and how RTL decisions impact post-layout power and timing.
  • •Familiarity with RTL low-power techniques such as clock gating, operand isolation, power gating strategies, and multi-VT usage with awareness of trade-offs.
  • •Experience with power analysis tools (e.g., PowerArtist, PrimeTime PX or equivalent) and strong Python skills for automation and AI/ML-driven analysis flows.
Education:PhD / Doctorate in Electrical Engineering, Computer Engineering, or related fields
Skills:Written and verbal communication
Tech Stack:VerilogPythonMachine LearningArtificial IntelligenceRTLVLSILogic synthesisPlace-and-routePowerArtistPrimeTime PXClock gatingOperand isolationPower gatingMulti-VTAI/ML-driven analysisPre-silicon power analysisGate-level power analysis

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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