SoC Compute/Memory Subsystem Architect
Intel
Ireland
Workplace: HybridFull timeFunction: Solutions Engineering & Sales EngineeringExperience: 10+ yearsEducation: bachelorsSkills: ["Cache coherency","Memory subsystems","DDR","LPDDR","HBM","SMMU","IOMMU","PCIe","CXL","NUMA","DVFS","Scalability","Power optimization","Architecture definition"]Senior SoC Compute/Memory Architect responsible for end-to-end design of compute complexes and high-performance memory subsystems for IPU/DPU platforms. Define cache hierarchies, coherency models, memory subsystems, and SMMU/IOMMU architectures; drive system integration with network/storage/accelerator blocks; optimize performance, power, and programmability for hyperscale data centers, cloud infrastructure, and AI workloads.
