5 months ago

Lead Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 52 minutes agoStatus: Live

Job Summary

Lead Design Engineer responsible for ASIC design and verification, focusing on PCIe and Storage interfaces (ONFI, XSPI, SD/eMMC). You will drive debugging efforts, collaborate with cross-functional teams, and ensure high-quality designs across the verification flow. The role requires strong communication and leadership to influence project outcomes and deliver robust silicon for complex ASIC blocks.

Location: Pune

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Design and verify ASIC blocks focusing on PCIe and Storage interfaces.
•Lead debugging efforts to identify and fix design/verification issues.
•Collaborate with cross-functional teams to ensure timely delivery and silicon quality.
•Contribute to the development and maintenance of verification environments and test benches.
•Communicate status, risks, and technical decisions to stakeholders.

Key Requirements

•3+ years ASIC design and verification experience.
•Expertise in PCIe and Storage interfaces (ONFI, XSPI, SD/eMMC) design and verification.
•Strong debugging skills.
•Excellent communication skills.

Experience:3+ yearsASICEmbedded hardwarePCIeStorage

Education:Bachelor's

Skills:CommunicationDebuggingCollaboration

Tech Stack:ASIC designPCIeONFIXSPISD/eMMCVerification

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

5 months ago

Lead Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 52 minutes agoStatus: Live

Job Summary

Location: Pune

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Design and verify ASIC blocks focusing on PCIe and Storage interfaces.
•Lead debugging efforts to identify and fix design/verification issues.
•Collaborate with cross-functional teams to ensure timely delivery and silicon quality.
•Contribute to the development and maintenance of verification environments and test benches.
•Communicate status, risks, and technical decisions to stakeholders.

Key Requirements

•3+ years ASIC design and verification experience.
•Expertise in PCIe and Storage interfaces (ONFI, XSPI, SD/eMMC) design and verification.
•Strong debugging skills.
•Excellent communication skills.

Experience:3+ yearsASICEmbedded hardwarePCIeStorage

Education:Bachelor's

Skills:CommunicationDebuggingCollaboration

Tech Stack:ASIC designPCIeONFIXSPISD/eMMCVerification

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor