Sr. ASIC Design Verification Engineer (Silicon Engineering)

SpaceX
Irvine
Workplace: OnsiteFull timeUSD 165,000 - 260,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Proactive","Problem-solving","Coding skills"]

Develop and verify next-generation digital ASICs for Starlink’s space and ground infrastructure. Own block and system-level verification, including writing and reviewing test plans, building test harnesses, executing regressions, and closing code and functional coverage. Contribute to pre-silicon verification, chip bring-up, and post-silicon validation, using methodologies like UVM/OVM/VMM and constrained-random verification to ensure complex designs are fully validated.

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FursaFursa
SpaceX
SpaceX
2 months ago

Sr. ASIC Design Verification Engineer (Silicon Engineering)

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live
Reposted: similar role first listed 8 months ago

Job Summary

Develop and verify next-generation digital ASICs for Starlink’s space and ground infrastructure. Own block and system-level verification, including writing and reviewing test plans, building test harnesses, executing regressions, and closing code and functional coverage. Contribute to pre-silicon verification, chip bring-up, and post-silicon validation, using methodologies like UVM/OVM/VMM and constrained-random verification to ensure complex designs are fully validated.
Location: Irvine
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Own digital ASIC verification at block and system level.
  • •Write and review test plans; develop test harnesses and test sequences.
  • •Execute test plans, run regressions, and drive code and functional coverage closure.
  • •Contribute to pre-silicon verification, chip bring-up, and post-silicon validation.
  • •Hands-on execution of the steps required to fully verify complex digital designs.

Pay and Benefits

Salary: USD 165,000 - 260,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceVisionDental401kDisability InsuranceLife InsurancePaid ParentalPaid Leave

Key Requirements

  • •Bachelor’s degree in electrical engineering or computer engineering.
  • •5+ years of experience with design verification and test bench development.
  • •Experience with verification methodologies such as UVM/OVM/VMM.
  • •Strong object-oriented programming knowledge, with strong problem-solving and coding skills.
  • •Experience with constrained random verification and developing test plans/coverage models/analyzing results.
Experience:5+ years
Education:Bachelor's
Skills:ProactiveProblem-solvingCoding skills
Languages:English
Tech Stack:UVMOVMVMMPythonConstrained random verificationTest plansTest harnessesFunctional coverageCode coverageRegressionsRTLASIC

Eligibility

Nationality:US National

Company Brief

SpaceX
Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.
Industry: Aerospace Manufacturing
Company Size: Enterprise (1,001+ employees)
Growth: Established Company
Valuation: Hectocorn (USD 100B+)
Funding: Series E+
Headquarters: Hawthorne, United States
Founded: 2002
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