Mixed Signal IP Verification Engineer

Work on pre-silicon functional verification for DDR PHY IP used in Intel SoCs across desktop and laptop products. Own the full verification flow—test plan creation, TB architecture, test bench development, simulation runs, and coverage/closure—while automating validation to improve efficiency. Debug issues in pre-silicon environments at IP, subsystem, and SoC levels and collaborate with digital/analog architects, RTL developers, and physical design teams to meet functional, performance, and power goals.