Senior Package Design Engineer

Micron Technology
Boise
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: []

Lead advanced semiconductor package co-design from silicon through system and High Volume Manufacturing (HVM). Own package layout and architecture, including die floorplanning, interconnection schemes, substrate stack-ups, and BEOL/RDL flows. Partner with Signal Integrity and Power Integrity teams to incorporate simulation results, run DFM/feasibility studies, and drive materials selection. Collaborate with OSAT partners and technology teams to ensure HVM readiness and advance design rules and roadmaps.

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Micron Technology
Micron Technology
1 week ago

Senior Package Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 11 hours agoStatus: Live

Job Summary

Lead advanced semiconductor package co-design from silicon through system and High Volume Manufacturing (HVM). Own package layout and architecture, including die floorplanning, interconnection schemes, substrate stack-ups, and BEOL/RDL flows. Partner with Signal Integrity and Power Integrity teams to incorporate simulation results, run DFM/feasibility studies, and drive materials selection. Collaborate with OSAT partners and technology teams to ensure HVM readiness and advance design rules and roadmaps.
Location: Boise
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Lead co-design from silicon to system by partnering with silicon design, business units, customers, and package architecture teams to define new product concepts.
  • •Optimize die floorplans, interconnection schemes, and package architectures from concept through HVM, including advanced DRAM product targeting for AI/data center, mobile, automotive, and edge computing.
  • •Own package layout and architecture by leading floorplanning and high-density routing/placement, defining substrate stack-ups, and interconnect schemes across BEOL/RDL flows.
  • •Drive electrical and physical design quality by partnering with SI/PI teams, running simulation-informed decisions, and conducting DFM reviews and feasibility studies.
  • •Collaborate globally to scale and sustain by working with OSAT assembly partners and suppliers on design rules, routing methodologies, DFMEA reviews, and assembly DOEs for HVM readiness.

Pay and Benefits

Equity and Bonus:Equity
Perks:Paid LeaveHealth InsuranceLearning BudgetWellness StipendEquity

Key Requirements

  • •Bachelor’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field plus 5 years of semiconductor package design experience, or a Master’s plus 3 years.
  • •Hands-on proficiency with advanced package EDA tools such as Cadence Allegro Package Designer+, Cadence Integrity 3D-IC, or Siemens/Mentor Xpedition.
  • •Experience with flip chip and wire bond interconnects, BEOL/RDL flows, substrate stack-ups, and high-density routing.
  • •Experience partnering with Signal Integrity (SI) and Power Integrity (PI) simulation teams to drive package architecture and design optimization.
  • •Experience collaborating with OSAT partners or assembly engineering organizations to deliver designs through HVM.
Experience:5+ yearsSemiconductor packagingDRAMHVM
Education:Bachelor's
Tech Stack:Cadence Allegro Package Designer+Cadence Integrity 3D-ICSiemens/Mentor XpeditionAutoCADAutodesk Mechanical

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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