DFT Engineer (Design for Testability) - Staff

Micron Technology
United States
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Structured problem-solving","Debug","Collaboration","Test optimization"]

Define and implement next-generation HBM Design for Test (DFT) architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy and at-speed test structures. Design and integrate test access mechanisms across wafer, die, cube, and SiP/system test flows while balancing performance, power, area, and cost. Partner with HBM build, verification, product engineering, test enablement, and external stakeholders to ensure DFT is correctly implemented, verified, and supports silicon debug and qualification.

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Micron Technology
Micron Technology
1 month ago

DFT Engineer (Design for Testability) - Staff

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Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live

Job Summary

Define and implement next-generation HBM Design for Test (DFT) architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy and at-speed test structures. Design and integrate test access mechanisms across wafer, die, cube, and SiP/system test flows while balancing performance, power, area, and cost. Partner with HBM build, verification, product engineering, test enablement, and external stakeholders to ensure DFT is correctly implemented, verified, and supports silicon debug and qualification.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and at-speed test structures.
  • •Develop DFT solutions for base die and DRAM die, addressing stacked-die and cube-level test requirements.
  • •Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows.
  • •Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets.
  • •Support yield learning, failure analysis, debug, and bring-up/qualification by enabling observability and controllability in silicon.

Pay and Benefits

Perks:Health InsuranceDentalVisionPaid Time-offPaid HolidaysParental Leave

Key Requirements

  • •Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field (or equivalent experience).
  • •Strong fundamentals in digital design and DFT concepts including scan, MBIST, boundary scan, and JTAG.
  • •Experience with RTL design and logic integration using SystemVerilog and/or VHDL.
  • •Familiarity with semiconductor test flows from wafer probe through final test.
  • •5+ years of DRAM or ASIC DFT design or verification experience.
Experience:5+ yearsSemiconductor testDRAMASICHBM3D integration
Education:Bachelor's in Electrical Engineering, Computer Engineering, or related field
Skills:Structured problem-solvingDebugCollaborationTest optimization
Tech Stack:HBMDRAMASICDFTScanMBISTJTAGBoundary scanTSVRedundancy testAt-speed testRTLSystemVerilogVHDLWafer probeSiPCube testSystem testLogic integrationSecurity requirements

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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