ASIC Design Engineering Technical Leader

Join the Cisco Silicon One Front-End Design team driving the core of Cisco’s silicon development. Lead RTL/ micro-architecture work, collaborate with verification and physical design teams, and help shape timing, power, and integration for cutting-edge devices. You’ll contribute to full chip integration, methodical validation, and post-silicon analysis, leveraging Verilog/SystemVerilog, UVM, and MATLAB in a high-impact, globally distributed silicon engineering environment.