Senior ASIC Design Verification Engineer
NVIDIA
Santa Clara
Workplace: HybridFull timeUSD 136,000 - 218,500 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Verilog","SystemVerilog","UVM","SVA","VCS","Questa","Perl","Tcl"]Senior ASIC Design Verification Engineer at NVIDIA responsible for unit and sub-system verification of IPs, developing test plans, building verification infrastructure, and collaborating with partner teams for system integration and DV workflows. Focus on hardware security, clocking, voltage regulation, and silicon correlation, with opportunities to apply agentic AI frameworks and advanced verification tools in a hybrid work environment.
