CPU Core Staff DFT Engineer

AMD
Santa Clara
Workplace: HybridFull timeFunction: Hardware, Embedded & Systems EngineeringEducation: bachelorsSkills: ["Excellent presentation","Strong inter-communication","Strong sense of ownership","Self-driven","Passionate about solving complex problems"]

Own ATPG/DFT responsibilities for the next generation of AMD high-performance cores as part of the Cores DFT Team. Use DFT tools and ATPG (stuck-at, at-speed, path-delay) with scan compression to drive first-pass silicon success. Debug low coverage and DRC violations, resolve complex test pattern/simulation failures, support silicon bring-up and post-silicon debug, and collaborate closely with architecture, IP, physical design, and product engineering teams using Verilog and Linux scripting.

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FursaFursa
AMD
AMD
19 hours ago

CPU Core Staff DFT Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 2 hours agoStatus: Live

Job Summary

Own ATPG/DFT responsibilities for the next generation of AMD high-performance cores as part of the Cores DFT Team. Use DFT tools and ATPG (stuck-at, at-speed, path-delay) with scan compression to drive first-pass silicon success. Debug low coverage and DRC violations, resolve complex test pattern/simulation failures, support silicon bring-up and post-silicon debug, and collaborate closely with architecture, IP, physical design, and product engineering teams using Verilog and Linux scripting.
Location: Santa Clara
Workplace: Hybrid
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Sr. Manager level

Key Responsibilities

  • •Own ATPG/DFT responsibilities for next-generation AMD high-performance cores.
  • •Drive first-pass silicon success by collaborating with architecture, IP design, physical design, and product engineering teams.
  • •Debug low coverage and DRC violation issues and develop efficient solutions.
  • •Debug complex test pattern issues and simulation failures.
  • •Support silicon bring-up and participate in post-silicon debug.

Key Requirements

  • •Experience with DFT tools, ATPG (stuck-at, at-speed, path-delay), and scan compression.
  • •Proficient in logic design using Verilog.
  • •Comfortable in Linux and writing/using scripting languages such as Perl and TCL.
  • •Strong knowledge of DFT techniques and industrial standards/practices, including JTAG, MBIST, and trade-offs between test quality and test time.
  • •Bachelor’s in Electrical Engineering/Computer Engineering (or Bachelor’s or Master’s in computer engineering/Electrical Engineering).
Education:Bachelor's in Electrical Engineering/Computer Engineering
Skills:Excellent presentationStrong inter-communicationStrong sense of ownershipSelf-drivenPassionate about solving complex problems
Languages:En-us
Tech Stack:DFTATPGStuck-AtAt-SpeedPath-DelayScan compressionVerilogLinuxPerlTCLJTAGMBISTLBISTIEEE 1149.1IEEE 1500IEEE 1687Tessent ScanTessent ATPGATEDRC

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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