Physical Design Engineer

Intel
Bengaluru
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Collaboration","Critical thinking","Problem-solving","Communication","Organizational abilities"]

Translate RTL into GDS for custom IP and SoC designs, building manufacturing-ready physical design databases for Intel products and Intel Custom ASIC customers. Own the full physical design flow—synthesis, place and route, clock tree synthesis, floorplanning, STA, and power/clock distribution—then drive verification and signoff such as equivalence, reliability, power integrity, and rule checks. Optimize PPA and contribute to improving physical design methodologies and flow automation.

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Intel
Intel
21 hours ago

Physical Design Engineer

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Last checked: 2 hours agoStatus: Live

Job Summary

Translate RTL into GDS for custom IP and SoC designs, building manufacturing-ready physical design databases for Intel products and Intel Custom ASIC customers. Own the full physical design flow—synthesis, place and route, clock tree synthesis, floorplanning, STA, and power/clock distribution—then drive verification and signoff such as equivalence, reliability, power integrity, and rule checks. Optimize PPA and contribute to improving physical design methodologies and flow automation.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Perform physical design implementation of custom IP and SoC designs from RTL to GDS, producing manufacturing-ready design databases.
  • •Execute the full physical design flow: synthesis, place and route, clock tree synthesis, floorplanning, static timing analysis, and power/clock distribution.
  • •Conduct verification and signoff activities including formal equivalence verification, reliability verification, power integrity analysis, layout verification, electrical rule checking, and structural design checking.
  • •Analyze violations and recommend fixes to improve current and future product architecture and timing closure.
  • •Optimize designs to improve power, frequency, and area, and contribute to physical design methodology improvements and flow automation.

Key Requirements

  • •5+ years of Physical Design execution with a Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
  • •3+ years of Physical Design execution with a Master’s degree.
  • •Deep knowledge of RTL-to-GDS workflows including synthesis, place and route, and static timing analysis.
  • •Expertise in power/performance/area (PPA) optimization techniques.
  • •Hands-on experience with industry-standard EDA tools for physical design and verification, including clock tree synthesis and low-power design.
Experience:5+ years
Education:Bachelor's
Skills:CollaborationCritical thinkingProblem-solvingCommunicationOrganizational abilities
Tech Stack:RTLGDSStatic timing analysisClock tree synthesisPlace and routeFloor planningPower/clock distributionEDA toolsFormal equivalence verificationPower integrityElectrical rule checkingLayout verificationDFT

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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