DV Intern

Etched
San Jose
Workplace: OnsiteFull timeFunction: Healthcare (Clinical, Medical, Wellness)Skills: ["SystemVerilog","UVM","Python"]

Design Verification intern to verify custom IPs powering Etched chips (systolic arrays, DMA engines, NoCs) ensuring robustness, high performance, and silicon-readiness, collaborating with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.

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FursaFursa
Etched
Etched
6 months ago

DV Intern

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 6 minutes agoStatus: Live

Job Summary

Design Verification intern to verify custom IPs powering Etched chips (systolic arrays, DMA engines, NoCs) ensuring robustness, high performance, and silicon-readiness, collaborating with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
Location: San Jose
Workplace: Onsite
Employment Type: Full time · 3 months
Job Function: Healthcare (Clinical, Medical, Wellness)

Key Responsibilities

  • •Ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready.
  • •Collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
  • •Contribute to verification work and writing test benches for ASIC/SoC design.
  • •Engage with physical design flows and tooling as part of verification activities.
  • •Learn quickly about transformers and other aspects of modern artificial intelligence while verifying related IPs

Pay and Benefits

Perks:Housing Support

Key Requirements

  • •Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
  • •Familiarity with high-speed digital logic
  • •Exposure to ASIC or SoC design concepts
  • •Familiarity with SystemVerilog, UVM, or Python
  • •Familiarity with verification work and writing test benches
Experience:HardwareASICSoCAI hardware
Skills:SystemVerilogUVMPython
Tech Stack:SystemVerilogUVMPython

Company Brief

Etched
Designs transformer‑specialized AI inference ASICs (product: Sohu) to accelerate large‑language‑model workloads, working with TSMC for fabrication and targeting energy‑efficient inference performance.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Early Stage Startup
Valuation: Unicorn (USD 1B+)
Funding: Series A
Headquarters: San Jose, United States
Founded: 2022
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