PMTS Silicon Design Engineer

AMD
United States
Workplace: OnsiteFull timeUSD 175,000 - 308,400 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: mastersSkills: ["Collaboration","Problem-solving","Debugging","Design verification","Power optimization"]

Execute RTL design and coding for processor core pipeline logic, collaborating with hardware and software engineers to define high-level architecture and next-generation microarchitecture. Contribute to design verification, synthesis, power reduction, timing convergence, and floorplanning. Work from clean-sheet design through tapeout and post-silicon debug, applying CPU/SOC/ASIC implementation skills including DFT/DFD, clocking/reset sequences, and power management.

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FursaFursa
AMD
AMD
3 days ago

PMTS Silicon Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Execute RTL design and coding for processor core pipeline logic, collaborating with hardware and software engineers to define high-level architecture and next-generation microarchitecture. Contribute to design verification, synthesis, power reduction, timing convergence, and floorplanning. Work from clean-sheet design through tapeout and post-silicon debug, applying CPU/SOC/ASIC implementation skills including DFT/DFD, clocking/reset sequences, and power management.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Execute RTL design and coding for processor core pipeline sections and related logic.
  • •Collaborate with engineers to define high-level architecture and participate in microarchitecture definition for next-generation high-performance processor cores.
  • •Contribute to design verification, synthesis, power reduction, timing convergence, and floorplan efforts.
  • •Support design from clean-sheet through product tapeout and post-silicon debug.
  • •Apply ASIC implementation skills including DFT/DFD logic, clocking/reset sequences, and power management topics.

Pay and Benefits

Salary: USD 175,000 - 308,400 annually

Key Requirements

  • •Master’s degree in Computer Engineering, Electrical Engineering, Electronic Engineering, or related field (or foreign equivalent).
  • •5 years of experience in Verilog RTL development for a CPU/SOC/ASIC environment.
  • •Experience with processor architecture, logic design, and RTL coding for a high-speed processor.
  • •Hands-on knowledge of power-saving techniques and physical design/verification, including synthesis, place-and-route, and timing closure.
  • •Experience across clean-sheet design to product tapeout and post-silicon debug, including microarchitecture development and ASIC implementation with static timing analysis.
Experience:5+ yearsASICSemiconductorHardware designProcessor design
Education:Master's in Computer Engineering, Electrical Engineering, Electronic Engineering, or related field
Skills:CollaborationProblem-solvingDebuggingDesign verificationPower optimization
Languages:English
Tech Stack:VerilogRTLASICSynthesisPlace and routeStatic timing analysisDFTDFDPerlShellTclClockingResetFloorplanMicroarchitecture

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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