ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)

Cisco
San Jose, Dallas, Seattle
Workplace: RemoteFull timeUSD 192,400 - 275,800 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 10+ yearsEducation: bachelorsSkills: ["Technical leadership","Mentoring","Communication","Collaboration","Design review"]

Lead signal and power integrity engineering for next-generation ASIC packaging within the Common Hardware Group. You will develop and apply design rules for ultra-high-speed signaling, analyze SI/PI across interposer, substrate, and PCB, and drive package design for high-volume releases with extraction and reporting. Partner with layout teams, system partners, vendors, and design leads to resolve complex technical issues, while mentoring engineers and improving design review practices.

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FursaFursa
Cisco
Cisco
3 days ago

ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)

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Last checked: 3 hours agoStatus: Live

Job Summary

Lead signal and power integrity engineering for next-generation ASIC packaging within the Common Hardware Group. You will develop and apply design rules for ultra-high-speed signaling, analyze SI/PI across interposer, substrate, and PCB, and drive package design for high-volume releases with extraction and reporting. Partner with layout teams, system partners, vendors, and design leads to resolve complex technical issues, while mentoring engineers and improving design review practices.
Location: San Jose, Dallas, Seattle
Workplace: Remote
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Manager level

Key Responsibilities

  • •Develop, document, and implement design rules for ultra-high-speed signaling to meet power, performance, and area goals.
  • •Analyze substrate signal integrity and power integrity, collaborate with layout teams, and develop optimal solutions across interposer, substrate, and PCB.
  • •Design, document, and develop ASIC packages for high-volume, high-quality releases, including post-layout extraction and reporting.
  • •Collaborate with system partners, vendors, and design leads to resolve complex power and signal integrity issues using advanced technology design rules.
  • •Define processes, methods, and tools for complex ASIC/package developments; lead chip architecture discussions and mentor the signal integrity team.

Pay and Benefits

Salary: USD 192,400 - 275,800 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kPaid ParentalLong-term DisabilityLife InsuranceRsusPaid Holidays

Key Requirements

  • •Bachelor’s degree in Electrical Engineering with 10+ years of relevant signal and power integrity experience, or Master’s with 8+ years, or PhD with 4+ years.
  • •Expertise in high-speed design principles including transmission line theory, electromagnetics, scattering parameters, and impedance network analysis for 56G PAM4 SerDes architectures.
  • •Experience performing pre- and post-layout SI/PI simulations using tools such as Cadence Sigrity, Ansys HFSS, and Keysight ADS.
  • •Experience conducting detailed layout reviews and physical design validation using tools such as Cadence APD and Ansys EM flows for crosstalk mitigation.
  • •Working knowledge of SPICE for circuit-level analysis, signal modeling, and performance validation.
Experience:10+ years
Education:Bachelor's in Electrical Engineering
Skills:Technical leadershipMentoringCommunicationCollaborationDesign review
Tech Stack:Cadence SigrityAnsys HFSSKeysight ADSCadence APDAnsys EMSPICEVector Network AnalysisIBIS

Company Brief

Cisco
Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1984
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