ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer

ByteDance
San Jose
Workplace: OnsiteInternshipFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Technical excellence","Passion for building","Collaboration"]

Join a fast-growing team building efficient, scalable video codec hardware from the ground up. As an ASIC Design Engineer intern, you’ll collaborate with architecture, algorithm, and verification experts to design high-performance, low-power video processing IPs. Apply computer architecture and ASIC design knowledge to accelerate encoding and processing for still images and videos, gaining hands-on experience across FPGA/ASIC, verification, and large-scale video platforms.

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FursaFursa
ByteDance
ByteDance
2 days ago

ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 2 days agoStatus: Live
Reposted: similar role first listed 1 week ago

Job Summary

Join a fast-growing team building efficient, scalable video codec hardware from the ground up. As an ASIC Design Engineer intern, you’ll collaborate with architecture, algorithm, and verification experts to design high-performance, low-power video processing IPs. Apply computer architecture and ASIC design knowledge to accelerate encoding and processing for still images and videos, gaining hands-on experience across FPGA/ASIC, verification, and large-scale video platforms.
Location: San Jose
Workplace: Onsite
Employment Type: Internship
Job Function: Design (Product/UX/UI/Visual)
Seniority: Intern level

Key Responsibilities

  • •Collaborate with architecture, algorithm, and verification teams to build high-performance, low-power video processing IPs.
  • •Apply computer architecture and ASIC design knowledge to create ASIC designs for video processing.
  • •Design hardware accelerators for advanced video encoding and processing.
  • •Work with the Video Silicon IP team to compress and process still images and videos.
  • •Contribute to building scalable, high-performing video platform and services.

Key Requirements

  • •Currently pursuing an undergraduate degree in computer science, electrical engineering, or a related technical discipline.
  • •Knowledge of video codecs.
  • •Experience with RTL design (SystemVerilog) or High Level Synthesis (HLS).
  • •Experience with UVM methodology, SystemC, or DPI.
  • •Good programming skills in Python for task automation.
Experience:Video codecsHardware designASIC designRTL design
Education:Bachelor's in computer science/electrical engineering (or related technical discipline)
Skills:Technical excellencePassion for buildingCollaboration
Tech Stack:FPGAASICSystemVerilogRTL designHLSUVMSystemCDPIPython

Company Brief

ByteDance
Develops consumer internet and content platforms, including TikTok and other apps for short-form video, news, and entertainment. It also builds advertising, commerce, and creator tools that connect audiences, brands, and publishers across global markets.
Industry: Digital Media
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Established Company
Headquarters: Beijing, China
Founded: 2012
WebsiteLinkedIn