Staff DRAM RTL design engineer
Hyderabad, Telangana
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 6-10 yearsEducation: mastersSkills: ["Collaboration","Communication","Problem-solving","Technical mentorship"]Design digital IP blocks end-to-end, from microarchitecture through RTL creation, integration, and support for physical hardware development for DRAM products. Own module interfaces and system-level architecture, using AI-based tools and automation to accelerate RTL optimization, testbench generation, debug, and design-space exploration. Drive full-chip integration and verification across CDC, lint, synthesis, STA, power analysis, and reliability, collaborating with CAD/EDA and cross-functional teams.
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