Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

NVIDIA
Santa Clara, Austin, Durham
Workplace: OnsiteFull timeUSD 136,000 - 264,500 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Self-directed execution","Root-cause analysis","Collaboration","Debuggability focus","Analytical thinking"]

Develop and improve pre-silicon verification and build/qualification infrastructure for large ASIC IP across multiple products. You’ll build automation for integration and qualification flows, strengthen CI reliability and scalability across distributed compute, and root-cause complex failures in verification, build systems, and tooling. Define and leverage engineering metrics to guide priorities and forecast risk, partnering across verification, firmware, methodology, and infrastructure teams.

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FursaFursa
NVIDIA
NVIDIA
5 days ago

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 29 minutes agoStatus: Live

Job Summary

Develop and improve pre-silicon verification and build/qualification infrastructure for large ASIC IP across multiple products. You’ll build automation for integration and qualification flows, strengthen CI reliability and scalability across distributed compute, and root-cause complex failures in verification, build systems, and tooling. Define and leverage engineering metrics to guide priorities and forecast risk, partnering across verification, firmware, methodology, and infrastructure teams.
Location: Santa Clara, Austin, Durham
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Apply practical AI workflows to support debug, triage, summarization, documentation, and workflow automation.
  • •Build and improve high-speed IO integration, build, simulation, and pre-submit qualification flows for large ASIC IP development.
  • •Improve CI reliability, turnaround time, debuggability, and scalability across distributed compute environments.
  • •Root-cause complex failures across development, verification, build systems, tools, infrastructure, and compute environments.
  • •Define and use metrics for integration latency, flow health, failure trends, and engineering efficiency to guide priorities and optimize systems.

Pay and Benefits

Salary: USD 136,000 - 264,500 annually
Equity and Bonus:Equity

Key Requirements

  • •BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
  • •5+ years of relevant industry experience.
  • •Strong understanding of ASIC development workflows including builds, simulation, regressions, debug, integration, and qualification.
  • •Experience with verification methodology such as UVM (or similar).
  • •Strong working knowledge of Verilog/SystemVerilog with RTL development or pre-silicon verification/debug experience.
Experience:5+ yearsASICSemiconductors
Education:Bachelor's
Skills:Self-directed executionRoot-cause analysisCollaborationDebuggability focusAnalytical thinking
Tech Stack:UVMVerilogSystemVerilogPythonPerlVCSVerdiXceliumCISimulationRegressions

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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