Mixed Signal Digital Design Lead

Broadcom
Colorado, United States
Workplace: OnsiteFull timeUSD 108,000 - 172,800 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 8+ yearsEducation: bachelorsSkills: ["Matlab","ArcSim","PLL","FLL","DLL","Mixed-signal","Clocking","SoC","Leadership"]

Lead architecture and design of high-performance clocking solutions (PLLs, FLLs, DLLs) for next-generation SoCs. Oversee full lifecycle of analog timing IPs, drive design methodologies, and collaborate with Analog and Physical Design teams while managing external IP vendors in a multi-disciplinary hardware environment.

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FursaFursa
Broadcom
Broadcom
4 months ago

Mixed Signal Digital Design Lead

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Source: Company careers pageValidated by: Fursa AI
Last checked: 19 days agoStatus: Live

Job Summary

Lead architecture and design of high-performance clocking solutions (PLLs, FLLs, DLLs) for next-generation SoCs. Oversee full lifecycle of analog timing IPs, drive design methodologies, and collaborate with Analog and Physical Design teams while managing external IP vendors in a multi-disciplinary hardware environment.
Location: Colorado, United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Manager level

Key Responsibilities

  • •Spearhead the architecture and design of high-performance clocking solutions for next-generation silicon (PLLs, FLLs, DLLs).
  • •Own the full lifecycle of analog timing IPs and post-silicon validation, ensuring seamless integration into large-scale SoCs.
  • •Lead and mentor cross-functional teams, collaborate with Analog Design and Physical Design to mitigate noise coupling and power integrity issues.
  • •Manage external IP vendors and define internal design methodologies to optimize timing and performance.
  • •Drive jitter decomposition and phase-noise analysis expertise, leveraging Matlab/ArcSim where applicable.

Pay and Benefits

Salary: USD 108,000 - 172,800 annually
Equity and Bonus:Equity
Perks:MedicalDentalVision401kEquityEsppPaid LeaveHolidays

Key Requirements

  • •Bachelors and 8+ years of related experience
  • •8+ years in mixed-signal design with focus on low-jitter, low-power frequency synthesis in advanced nodes (N5, N3P)
  • •ability to drive trade-offs between analog and digital clocking implementations for large-scale SoCs
  • •experience in managing external IP vendors and defining internal design methodologies
  • • Matlab or ArcSim experience desired and strong jitter/phase-noise analysis background
Experience:8+ yearsMixed-signalClockingSoCPLLFLLDLL
Education:Bachelor's
Skills:MatlabArcSimPLLFLLDLLMixed-signalClockingSoCLeadership
Tech Stack:MatlabArcSimPLLFLLDLLMixed-signalClockingSoC

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn