Lead Verification Engineer

AMD
Telangana, Hyderabad
Workplace: OnsiteFull timeINR 4,860,800 - 6,944,000 annuallyFunction: Administration & Executive AssistanceSkills: ["Accuracy","Detail-oriented","Communication","Problem-solving"]

Work on the front-end design/integration team within Radeon Technologies Group to drive first-pass silicon success. Implement and verify DFT architecture and features, including scan insertion and ATPG pattern generation, then validate ATPG patterns via gate-level simulation. Analyze test coverage and test cost reduction opportunities, and provide post-silicon support to ensure successful bring-up and improve yield learning while partnering with silicon design and product engineering teams.

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FursaFursa
AMD
AMD
18 hours ago

Lead Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 14 hours agoStatus: Live

Job Summary

Work on the front-end design/integration team within Radeon Technologies Group to drive first-pass silicon success. Implement and verify DFT architecture and features, including scan insertion and ATPG pattern generation, then validate ATPG patterns via gate-level simulation. Analyze test coverage and test cost reduction opportunities, and provide post-silicon support to ensure successful bring-up and improve yield learning while partnering with silicon design and product engineering teams.
Location: Telangana, Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance
Seniority: Mid level

Key Responsibilities

  • •Implement and verify DFT architecture and features.
  • •Perform scan insertion and ATPG pattern generation.
  • •Verify ATPG patterns using gate-level simulation.
  • •Conduct test coverage and test cost reduction analysis.
  • •Provide post-silicon support to ensure successful bring-up and improve yield learning.

Pay and Benefits

Salary: INR 4,860,800 - 6,944,000 annually

Key Requirements

  • •Understanding of Design for Test (DFT) methodologies and DFT verification experience (e.g., IEEE1500, JTAG 1149.x, scan, memory BIST).
  • •Experience using Mentor TestKompress and/or Synopsys Tetramax/DFTMAX.
  • •Experience with VCS simulation and Perl/Shell scripting.
  • •Verilog RTL design experience.
  • •Bachelors or Masters degree in computer engineering or Electrical Engineering.
Education:
Skills:AccuracyDetail-orientedCommunicationProblem-solving
Languages:En-us
Tech Stack:DFTIEEE1500JTAG 1149.xScan insertionATPGGate-level simulationMemory BISTMentor TestKompressSynopsys TetramaxDFTMAXVCSPerlShell scriptingVerilog RTL

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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