DFx-DV Lead

AMD
Bengaluru
Workplace: OnsiteFull timeINR 4,860,800 - 6,944,000 annuallyFunction: Administration & Executive AssistanceSkills: ["Detail-oriented","Communication","Problem-solving"]

Lead DFx/DV activities to achieve first-pass silicon success within the front-end design/integration team. Drive and verify DFT architecture and features, including scan insertion and ATPG pattern generation, then validate patterns using gate-level simulation. Perform test coverage and test cost reduction analysis, and provide post-silicon support to improve bring-up outcomes and yield learning. Coordinate with architecture, IP design, physical design, and product engineers.

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FursaFursa
AMD
AMD
1 week ago

DFx-DV Lead

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Lead DFx/DV activities to achieve first-pass silicon success within the front-end design/integration team. Drive and verify DFT architecture and features, including scan insertion and ATPG pattern generation, then validate patterns using gate-level simulation. Perform test coverage and test cost reduction analysis, and provide post-silicon support to improve bring-up outcomes and yield learning. Coordinate with architecture, IP design, physical design, and product engineers.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance

Key Responsibilities

  • •Implement and verify DFT architecture and features.
  • •Perform scan insertion and ATPG pattern generation.
  • •Verify ATPG patterns using gate-level simulation.
  • •Analyze test coverage and conduct test cost reduction.
  • •Provide post-silicon support to enable successful bring-up and enhance yield learning.

Pay and Benefits

Salary: INR 4,860,800 - 6,944,000 annually

Key Requirements

  • •Understanding of Design for Test (DFT) methodologies and DFT verification experience (e.g., IEEE1500, JTAG 1149.x, scan, memory BIST).
  • •Experience with ATPG pattern generation and verification with gate-level simulation.
  • •Ability to perform test coverage analysis and test cost reduction analysis.
  • •Hands-on experience with Mentor testkompress and/or Synopsys Tetramax / DFTMAX.
  • •Experience with VCS simulation tools, Perl/Shell scripting, and Verilog RTL design.
Experience:SemiconductorSilicon designDFT
Education:
Skills:Detail-orientedCommunicationProblem-solving
Tech Stack:IEEE1500JTAG 1149.xScanMemory BISTMentor testkompressSynopsys TetramaxDFTMAXVCSPerlShell scriptingVerilog RTL

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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